Improving Detectability of Resistive Open Defects in FPGAs
نویسنده
چکیده
This paper presents a new technique for detecting resistive open defects in FPGAs. This technique is based on the reconfigurability feature of FPGAs. Using this technique, the detectability of a defect can be improved by several orders of magnitude. Also, a method is developed to scale the detectability. Simulation results show the effectiveness of this method.
منابع مشابه
Improving Detectability of Resistive Open Defects in FPGA
This paper presents a new technique for detecting resistive open defects in FPGAs. This technique is based on the reconfigurability feature of FPGAs. Using this technique, the detectability of the defect can be improved by several orders of magnitude. Also, a method is developed to scale the detectability. Simulation results show the effectiveness of this method.
متن کاملTesting for resistive open defects in FPGAs
This paper presents a new technique for detecting resistive open defects in FPGAs. This technique is based on the reconfigurability feature of FPGAs. Using this technique, the delay of a defective path is increased several times more than the delay of the fault-free path, resulting in a higher resolution in detectability of resistive open defects in FPGAs, even at lower tester speed. Various de...
متن کاملFPGA Interconnect Delay Fault Testing
The interconnection network consumes the majority of die area in an FPGA. Presented is a scalable manufacturing test method for all SRAM-based FPGAs, able to detect multiple interconnect delay faults, multiple bridging faults, or both. An adjustable maximum sensitivity to resistive open defects of several kilo-ohms is achieved. A bridging fault that causes a signal transition to occur on at lea...
متن کاملComparison of Open and Resistive-Open Defect Test Conditions in SRAM Address Decoders
This paper presents a comparative analysis of open (ADOF: Address Decoder Open Fault) and resistive open defects in address decoders of embedded-SRAMs. Such defects are the primary target of this study because they are notoriously hard-to-detect faults. In particular, we consider dynamic defects which may appear in the transistor parallel plane of address decoders. From this study, we show that...
متن کاملUnified Diagnostic Method Targeting Several Fault Models
Fault diagnosis is important in improving the design process and the manufacturing yield of nanometer circuits. It is however a challenging problem as today’s complex defects lead to an explosion of the diagnosis solution space with the increasing number of possible fault locations and fault models. Our goal in this study consists in developing a new diagnosis method targeting almost all the na...
متن کامل